CES 520 - WEEK 2 August 29, 2006
- References
- 3.3V core with 5V tolerant inputs.
- EMI reduction
- Separate power supply pins for output buffers prevents CPU core noise getting out the I/O pins
- Clock doubler allows using crystal at 1/2 the frequency
- Clock spectrum spreader
- Claim 15 dB reduction above 100 MHz for FCC class A and B tests
- Phase-modulates the clock signal to "smear out" the emissions spectrum
- Requires 2 to 9 ns faster memory access time
- Causes slight phase jitter on serial clocks
- Low power operation: "Sleepy mode"
- Clock frequency may be divided; divide ratio may be changed under software control.
- Can turn off main oscillator and use real-time clock's 32.768 kHz for super-low power.
- Memory strobes may be shortened in sleepy mode to reduce power.
- Wait-state generation for external memory
- Built-in programming/debug port
- Lots of I/O features
- "Glueless" memory interface to SRAM and Flash devices
- 3 separate CS (chip select) lines for up to 3 memory devices
- 2 each OE (output enable) and WE (write enable) lines
- Optional separate "auxiliary I/O" bus
- Reduces loading on memory bus
- Parallel port A is 8-bit I/O data bus
- Parallel port B provides 6 LSBs of I/O address
- Parallel port E can be configured as I/O CS lines
- Slave port allows multi-processor systems
- The slave may have a slave to daisy-chain more than two processors
- Master may cold-boot the slave and download software via the slave port
- May not use auxiliary I/O bus if slave port is used
- 56 parallel I/O pins
- Shared with serial ports and other features
- Ports D, E, F, G can be configured for timer-synchronized outputs
- Inputs are double-latched to prevent metastability
- 6 serial ports
- Bit rate is system clock rate divided by N, N >= 8
- Clock rate must be selected to be a multiple of serial bit rate
- All may operate asynchronously
- Ports A, B, C, D support SPI synchronous interface
- Ports E, F support HDLC/SDLC synchronous, including IrDA
- Serial port A is used for programming and debug
- Real-time clock (RTC)
- Uses separate 32.768 kHz oscillator
- 3 uA current drain
- Separate power supply pin allows battery backup
- Timers
- Timer A
- Ten 8-bit countown/reload timers
- Peripheral clock = processor clock or procesor clock * 8
- Timer A1 can prescale the others by up to 256
- Timers A2-A7 can be used for:
- Serial port clocks
- Interrupts
- Timer-synchronized parallel output ports
- Timers A8, A9, A10 provide clocks for input capture, PWM, and quadrature decode modules.
- Timer B
- 10-bit counter
- Can be read but not written
- Outputs a pulse on B1 or B2 when the count matches the value in the compare register
- Used for interrupts or timer-synchronization of parallel ports
- Periodic interrupt
- Uses 32,768 kHz oscillator divided by 16
- Interrupt every 488 us, used as general-purpose clock timing
- Watchdog timer (WDT)
- Resets processor if software "gets lost"
- Software must reset WDT before it times out
- Uses 32.768 kHz oscillator
- 17-bit counter allows timeout time of 0.25, 0.5, 1, or 2 seconds
- Potential problem: Be sure WDT can not be reset in an endless loop if software crashes.
- Require several "must execute" sections of code to execute before resetting WDT
- Two "input capture" channels allow time measurements
- 16-bit counter driven by timer A8 (i.e. from clock/256 to full clock rate)
- Measures time difference or absolute time of two events ("start" and "stop")
- Can also be used to synchronize parallel output registers with an input event
- PWM
- 4 PWM channels
- 10-bit resolution (1/1024)
- Implements a 10-bit D/A converter if the output is properly filtered.
- Pulses can be spread into 4 groups spaced 256 apart for easier filtering
- Two quadrature decoders
- 8-bit up/down counter keeps track of number of shaft pulses.
- Generates interrupt whenever the counter over- or under-flows.
- Encoder input is digitally filtered, clocked with the output of timer A10
- The CPU architecture is based on the old Z-80 microprocessor
- 8-bit data bus.
- High performance is not an issue with many embedded systems.
- Registers
- 8 and 16-bit accumulators
- 16-bit index registers (HL, IX, and IY can be used as accumulators or index registers)
- Flag (status) register
- 16-bit program counter with extension register
- 16-bit stack pointer
- Interrupt registers
- Alternate register set
- Originally used in the Z-80 for fast context switching.
- Rabbit adds new instructions to access these registers directly - doubles number of registers.
- Separate address bus for I/O.
- 16-bit I/O addresses. 64 kB I/O address space.
- Memory address space:
- 16-bit logical memory address. 64 kB logical address space.
- 20-bit physical address. 1 MB physical address space.
- Rabbit memory configuration
- Root Memory: everything below 0xE000
- Base (Root) Segment
- Not to be confused with Root Memory
- Typically 24 kbytes
- Normally mapped to Flash
- Contains
- Root Constants
- Root Code
- BIOS
- Interrupt routines
- Short functions that are called frequently
- Any function that modifies XPC (memory management) register
- Data Segment
- Typically 28 kbytes
- Mapped to RAM
- Contains Root Variables, C variables that are not constant
- Can also contain executable code downloaded from flash, for example:
- Flash programming code
- Self-modifying code
- Debugging aids
- Stack Segment
- Usually 4 kbytes
- Mapped to RAM
- Contains C function automatic variables, that are held on temporary stacks
- Different stacks can be placed in different physical memory pages if more than 4k is needed
- Extended memory: above 0xE000
- 8 kbytes
- Different pages can be mapped to Flash (code or constants) or RAM (buffers)
- For large programs, most program code is in Extended Memory
- Can also be used for variables and buffers to save memory in the Data Segment
- MMU (Memory Management Unit)
- Converts logical addresses to physical addresses
- Automatically shifts the 8-kbyte extended memory segment by 4 kbytes at a time as code executes
- Optional separate Instruction/Data space mode
- Allows using entire Base and Data Segments for both instructions and data
- MMU inverts address lines 16, 19, or both to switch between instructions and data
- By default, Dynamic C compiles with this feature disabled
- Prioritized interrupts
- 3 priority levels
- Up to 4 nested interrupts supported in hardware
- Max. interrupt response time < ~20 clock cycles for highest-priority
- 2 external interrupt lines
- ICP (In-Circuit Programming)
- Flash memory can be loaded unprogrammed.
- Plugging in the programming cable pulls the startup pins (SMODE0, SMODE1) high
- Causes Rabbit to enter cold-boot mode upon reset
- To load new software, Dynamic C
- Forces reset
- Loads and runs a boot program
- Compiles and loads the BIOS and user software
- Runs the BIOS
- Runs and debugs the user program
Other Embedded Microcontroller features
- On-chip memory
- RAM, ROM, or Flash memory for program
- RAM memory for data
- EEPROM memory for non-volatile data
- Code protection - prevents reading of internal program memory
- External memory interface
- Memory-mapped vs port I/O
- Big endian vs little endian
- DMA (Direct Memory Access)
- Transfers data to/from memory automatically, in the background, with minimal software overhead.
- In microcontrollers it is often used to transfer data to/from internal peripherials (e.g. serial ports).
- On-chip voltage regulator (e.g. for 2.5V core with 3.3V supply)
- Brown-out detector (BOD)
- More powerful timers. e.g. PIC:
- Up to one 16-bit and four 32-bit or dual-16-bit timers
- Selectable prescaler
- 32-bit or two 16-bit timers per module
- Timer or counter mode
- Timer gate operation
- Operates during idle and sleep modes
- Counter match register
- Timing for other functions (ADC, input capture, output compare)
- More powerful pulse-width modulator (PWM) e.g. PIC:
- Separate pins for bridge driver
- Up to 16-bit resolution
- Multiple operating modes
- Power-saving features
- Sleep mode
- Turns off nearly all circuitry, including clock(s)
- Exit sleep mode on:
- External interrupt
- Reset
- Watchdog timer timeout
- "Doze" mode
- CPU clock rate is reduced
- System clock and all peripherals continue to operate at full speed.
- Peripheral module disable
- Selectively turn off unused peripherals
- More than 2 external interrupts, more than 3 interrupt priority levels
- Hardware support for various serial interfaces
- SPI
- I2C
- Microwire
- UART (RS-232, RS-485)
- IrDA
- USB
- CAN
- JTAG test port
- Boundary scan testing
- May also be used for in-circuit programming
- Analog interfaces:
- A/D converters
- Typically includes an analog MUX to allow reading multiple voltages with one A/D
- PIC has automatic scan mode with output buffer
- D/A converters
- Often PWM port is used for this purpose
- Analog comparators
- DSP capability
- Typically Harvard architecture: separate program and data address spaces
- Sometimes two separate data spaces as well
- Multiplier/accumulator (MAC)
- Typically can read two values from memory, multiply, and accumulate in one cycle (pipelined)
- Barrel shifter
Choice of microcontroller
- Support for needed I/O interfaces
- Sufficient memory
- Memory architecture
- Number of interrupts
- Processing speed
- ICP and/or ROM version available for high-volume applications
- Processor cost
- Effect on total system cost
- Support for high-level language(s)
- Operating system availability (some real-time operating systems come with C source code)
- Short-term and long-term part availability
- Current knowledge base (is the development team already familiar with the part family)
- Flexibility for use in future projects
- Cost of development tools
- Technical support
- Development tool availability and quality
- IDE (Integrated Development Environment)
- Editor
- Assembler and compiler
- Debugger
- PROM programmer
- ICE (In-Circuit Emulators)
- Development kits
- Microchip PIC
- Low-cost, relatively low-performance parts
- Low-cost, easy-to-use development tools
- Tons of documentation
- Popular with hobbyists
- Lots of peripherals
- dsPIC parts include DSP engine in addition to microcontroller CPU core
- The original 35-instruction architecture parts are awkward to program
- Atmel
- 8051, AT91, and AVR microcontrollers
- Low-cost development tools
- Many parts are targeted to automotive industry
- Rabbit 3000
- Medium-complexity systems
- Closely-integrated development software and tools for rapid prototyping
- Dallas Semiconductor (now a division of Maxim)
- Flash-based 8051 and MAXQ RISC microcontrollers
- Many peripheral chips
- Freescale (former Motorola)
- Wide range of microcontrollers, from 8 to 32 bit, including PowerPC
- Many other semiconductor products
- Infineon (Formerly Siemens)
- 8 to 32-bit microcontrollers
- Intel
- 8 to 32-bit microcontrollers
- 386EX: many development tools available for x86
- National
- Renesas (formerly Hitachi)
- Broad-range semiconductor manufacturer, including many microcontrollers
- Analog Devices
- DSPs
- Analog devices, such as the "MicroConverter", a 12-bit ADC with embedded CPU
- Texas Instruments
Assignments:
- Read An Embedded Software Primer, Chapter 9
- Read Embedded Systems Design, Chapter 2 pp 36-64 and Chapter 3
- Study the Rabbit 3000 Data Sheet
- Look over the Rabbit 3000 User Manual