Course:Fundamentals of Digital Logic Design (ES 112)
Section: 001
Spring, 2011
Syllabus
Instructor: Jack Ou, Ph.D.
Office Location: Salazar Hall 2010B
Email:jack.ou AT sonoma DOT edu
Class location: Salazar Hall 2009A
Office Hours: By appointment during MW10:15-10:45 and TH 12:30-1
Course Description:
Review of set theory and binary system, digital logic, Venn diagram, logic gates, minimization techniques, combinatorial logic and design of simple combinatorial logic circuits such as 1-bit adder; concept of coders, decoders and integrated circuits.
Required Textbooks:
M. Morris Mano and Michael D. Ciletti, “Digital Design”, 4th Edition, Prentice Hall, ISBN 0-13-198924-3.
Date |
Topic |
Reference |
Homework |
Due Date | Solution |
1/19 |
Introduction |
N/A |
N/A |
N/A |
N/A |
1/26 |
1.2-1.4 |
2/2 |
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2/2 |
1.5-1.6 |
2/9 |
|||
2/9 |
Demos/discussion |
N/A |
N/A |
N/A |
N/A |
2/16 |
1.9, 2.1-2.4 |
2/23 |
|||
2/23 |
2.5-2.6 |
3/1 |
|||
3/1 |
2.7-2.8 |
N/A |
|||
3/8 |
Quiz 1 |
1-2 |
N/A |
N/A |
N/A |
| 3/15 | Review |
||||
| 3/22 | 3.1-3.4 |
N/A |
|||
| 3/29 | Spring break |
N/A |
N/A |
N/A |
|
| 4/5 | Quiz 2, Project Discussion |
N/A |
N/A |
N/A |
|
| 4/12 | 3.6-3.9 |
N/A |
N/A |
||
| 4/19 | Quiz 3,
|
4.5 |
|||
| 4/26 | 4.7-4.11 |
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| 5/3 | Quiz 4, wrap-up |
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| 5/10 | final, 2:00 p.m.-3:50 p.m. |