DIGITAL CIRCUIT DESIGN

Objective:

The objective of this experiment is to study three fundamental digital circuits. These three circuits form the basis of all other digital circuits, from these three (plus the OR gate) any other digital circuit, including memory elements, can be designed and built. These three digital circuits will be designed with diodes and transistors, as the integrated ones are. The following three circuits will be studied in this experiment.

  • BJT Inverter (NOT gate)
  • BJT - diode AND gate
  • BJT - diode NAND gate

Introduction:

  1. Properties of Diode-BJT Logic Circuits
    To achieve digital logic levels in practical circuitry, two controllable stable states are required. The logic levels are referred to in the binary number system as 'zero' and 'one'. The two stable states are referred to as 'low' and 'high.' In the laboratory, the current switching properties of bipolar junction transistors and diodes can be used to develop analog circuits which form the basic building blocks required to implement digital logic processes. Three basic digital circuits will be built in this experiment.
  2. Inverter Circuit
    When the input signal applied to the circuit of Figure 1 is at a low voltage level, (less than 0.7 Volts) the base-emitter junction of the transistor is driven into cut-off. In this case, no current flows through RC, (IC=O). The output voltage will be high and equal to the DC supply voltage. When the input voltage becomes greater than 0.7 volts, the transistor is driven into saturation. The output voltage will be low and almost equal to the junction saturation voltage VCE,SAT (about 0.3 Volts). The transistor of this circuit functions as a switch and the circuit operates as an inverter.
  3. Inverter (NOT) gate circuit performing the NOT logic function
    Figure 1 - Inverter (NOT) gate circuit performing the NOT logic function
  4. AND Gate Circuit
    In the circuit of Figure 2, when both input sources A and B are at high enough voltage levels, (~ 5 Volts) diodes D1 and D2 are reverse biased and no current will flow through R1, (IR1 = 0). In this case, the output voltage level will be the same as the power supply voltage level (~ 5 Volts). However, when one or both inputs are at zero voltage levels, one or both diodes will be forward biased and a current will flow through R1. In this case, the output voltage level is low and almost equal to the diode voltage drop. (~ 0.7 Volts).
  5. AND gate circuit performing the function of digital AND gate
    Figure 2 - AND gate circuit performing the function of digital AND gate
  6. NAND Gate Circuit
    The NAND gate circuit of Figure 3 can be formed by combining the inverter circuit of Figure 1, and the AND gate circuit of Figure 2. In this circuit, when one or both inputs A and B are at low voltage level (compared to the power supply voltage level) either diode D1 or D2 or both will be forward biased. In such a case, the voltage drop across diode D1 or D2 will not be large enough to forward bias the base emitter junction and the transistor will be driven into cut-off. Hence no collector current will flow through R2 and the output voltage VOUTPUT is equal to the power supply voltage VCC. When both inputs A and B are at high voltage levels (5 Volts), both diodes will be reverse biased and the transistor will be in saturation. Therefore, the output voltage will be low.
  7. NAND gate circuit performing the function of a digital logic NAND gate
    Figure 3 - NAND gate circuit performing the function of a digital logic NAND gate

Pre-Lab Work:

  1. Analysis of Inverter Circuit
    Sketch the expected output voltage of the circuit of Figure 1 as a zero Volt DC offset 6-Volt peak-to-peak triangle wave (5kHz) is applied to the input. This signal has a minimum voltage of -3 Volts and a maximum voltage of +3 Volts. Estimate the minimum input voltage needed to put the transistor in saturation. Also find the saturation collector current. Assume Β=100, VCE,SAT = 0.2 volts, and VBE=O.7 Volts (when the BE junction is carrying current). Place the sketch as part of your report.
  2. Logic Truth Tables
    Construct the theoretical truth tables for the circuits of Figures 1, 2, and 3.
  3. Saturation Input Voltage
    Estimate the minimum input voltage required to put NAND gate's transistor in saturation (Figure 3).

Lab Work:

  1. Testing of Inverter (NOT) Circuit:
    Form the circuit of Figure 1, and construct the truth table experimentally. Apply a 5kHz triangle wave signal to the input, (as done theoretically in the Pre-Lab) and observe the output on the DC coupled channel of the oscilloscope. Make scaled sketches of both the input and output signals as part of your report.
  2. Testing of AND Gate Circuit:
    Form the circuit of Figure 2 and construct the truth table experimentally. Apply the output of the transistor switch circuit (NOT gate) of Figure 1 to the B input. Record scaled sketches of the input and output signals for the following cases.
    1. Input terminal A connected to ground
    2. Input terminal A connected to +5 volts
  3. Testing of NAND Gate Circuit:
    Form the circuit of Figure 3 and construct the truth table experimentally. Apply 6 Volt peak to peak, zero DC offset triangle wave to the input A and obtain scaled sketches of the output waveform for the following cases.
    1. Input terminal B connected to ground
    2. Input terminal B connected to +5 volts
  4. Measurement of the threshold voltages for the Inverter and the NAND gate:
    Threshold voltages are the critical voltages at the input of the gate at which the output voltage of the digital gate will flip from one state to the other.
    1. The student should think of a proper procedure to measure the threshold voltages for the inverter in Figure 1, and the NAND gate in Figure 3.
    2. Measurements should be done for the threshold when the input switches from High to Low, and from Low to High.
  5. Measurement of the switching speed of the Inverter and the NAND gate:
    The student is required to suggest a method for measuring the switching speed of the Inverter and the NAND gates shown in Figures 1 and 3. Perform the measurements on both gates for two situations when the gates switch from High to Low and from Low to High.

Results:

  1. Analysis of Truth Tables:
    Analyze the scaled sketches obtained in the Lab Work section; state whether or not the circuits performed the logic functions predicted by the truth tables.
  2. Transistor Saturation Voltages:
    From the scaled sketches, determine the minimum input voltage levels for which the transistor saturated in the first and third parts of the Lab Work. Compare these values to the predicted ones.

Report:

  1. Sketches of input and output voltage waveform for the Figure 1 as an input of 5kHz triangular signal is applied. These sketches should contain the sketches created in the Pre-Lab section.
  2. Create a table with measured and calculated results.
  3. Explain the method used in measuring the threshold voltages and report the data obtained.
  4. Explain the method used in measuring the switching speed of the gates and report the data obtained. Comment on the accuracy of the measurement.